Synchronizing Data
Synchronizing Data
IJITEST-2026-005
The increasing demand for energy-efficient computing has driven research into novel logic architectures beyond traditional binary logic. This paper presents the design and implementation of an energy-efficient ternary logic processor using Carbon Nanotube Field-Effect Transistors (CNTFETs) for advanced nanotechnology applications. Ternary logic, which operates with three discrete states (0, 1, 2), offers higher computational density, reduced transistor count, and lower power consumption compared to conventional binary architectures. CNTFETs, with their superior electrical properties such as high carrier mobility, low sub-threshold swing, and excellent scalability, serve as an ideal candidate for implementing ternary logic circuits. The proposed ternary processor integrates ternary logic gates, arithmetic units, multiplexers, memory units, and control circuits, all optimized for low-power operation. Simulation results demonstrate significant improvements in energy efficiency, area reduction, and computational throughput compared to conventional CMOS-based binary processors. Additionally, the processor's architecture is tailored for emerging applications in artificial intelligence, cryptography, and IoT devices, where power efficiency and performance are critical. The findings of this study highlight the potential of CNTFET-based ternary computing as a promising alternative for next-generation low- power processors in nanotechnology-driven applications.
Swapna Priya Chikatla, S Naga Mallik Raj, Thorlapati Gulshan Sri Babu & CH. Subba Rao " Energy-Efficient Ternary Logic Processor Using CNTFETs for Advanced Nanotechnology Applications".
International Journal of Innovative Trends in Engineering Science and Technology (IJITEST), Vol. 1, Issue 1 , 2026.